High capacity BGA 132/152 chips have complex pinout
which includes 2 lines of data buses and two groups of 4 CE (Crystal) signals
which are connected separately to the first and the second data bus. This solution guarantees high speed of read/write operations since data can be allocated parallelly (Multi Plane Page Allocation) among crystals via each data bus. Wherefore usually those chips consist of 2 crystals, which are connected to the first and to the second data bus and it is necessary to check each group of crystals.
First data bus with its 4 CE signals is located physically
on the second half of the chip and the second data bus is located in the first half, like on the picture below.
Dumps from the first group of crystals can be read while chip is placed in default orientation in the adapter.
In order to read the dumps from the second group, it is necessary to put the chip in reversed orientation inside the adapter
and switch VSP1,2,3 checkboxes in the reader configuration menu.
If the chip doesn't have connected crystals to the second data bus VNR will not display ID.
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